1. Field of the Invention
The present invention relates to interface standards used within computer systems, and more particularly to interfaces or busses handling multiple word sizes and having the capability of having multiple bus controllers.
2. Description of the Prior Art
Microprocessors and the personal computers which utilize them have been becoming more powerful over the past few years. Currently available personal computers have capabilities easily exceeding the mainframe computers of twenty to thirty years ago and approaching the capabilities of minicomputers currently manufactured. Microprocessors having word sizes of 32 bits wide are now available, whereas in the past eight bits was conventional and sixteen bits was common.
Personal computer systems have developed over the years and new uses are being discovered daily. The uses are varied and, as a result, have different requirements for the various subsystems forming a complete computer system. Because of production volume requirements and the reduced costs as volumes increase, it is desirable that as many common features as possible are combined into high volume units. This has happened in the personal computer area by developing a basic system unit which generally contains a power supply, provisions for physically mounting various mass storage devices and a system board, which in turn incorporates a microprocessor, microprocessor related circuitry, connectors for receiving circuit boards containing other subsystems, circuitry related to interfacing the circuit boards to the microprocessor, and memory. The use of connectors and interchangeable circuit boards allows subsystems of the desired capability for each computer system to be easily incorporated into the computer system.
The use of interchangeable circuit boards necessitated the development of an interface or bus standard so that the subsystems could be easily designed and problems would not result from incompatible decisions by the system unit designers and the interchangeable circuit board designers.
The use of interchangeable circuit boards and an interface standard, commonly called a bus specification because the various signals are provided to all the connectors over a bus, was incorporated into the original International Business Machines Corporation (IBM) personal computer, the IBM PC. The IBM PC utilized an Intel Corporation 8088 as the microprocessor. The 8088 has an eight bit, or one byte, external data interface but operates on a 16 bit word internally. The 8088 has 20 address lines, which means that it can directly address a maximum of 1 Mbyte of memory. In addition, the memory components available for incorporation in the original IBM PC were relatively slow and expensive as compared to current components. The various subsystems, such as video output units or mass storage units, were not complex and also had relatively low performance levels because of the relative simplicity of the devices available at a reasonable cost at that time.
With these various factors and the component choices made in mind, an interface standard was developed and used in the IBM PC. The standard utilized 20 address lines and eight data lines, had individual lines to indicate input or output (I/O) space or memory space read or write operations, and had limited availability of interrupts and direct memory access (DMA) channels. The complexity of the available components did not require greater flexibility or capabilities of the interface standard to allow the necessary operations to occur. This interface standard was satisfactory for a number of years.
As is inevitable in the computer and electronics industry, capabilities of the various components available increased dramatically. Memory component prices dropped and capacities and speeds increased. Performance rates and capacities of the mass storage subsystems increased, generally by the incorporation of fixed disk units for the previous floppy disk units. The video processor technology improved so that high resolution color systems were reasonably affordable. These developments all pushed the capabilities of the existing IBM PC interface standard so that the numerous limitations in the interface standard became a problem. With the introduction by Intel Corporation of the 80286 microprocessor, IBM developed a new, more powerful personal computer called the AT. The 80286 has a 16 bit data path and 24 address lines so that it can directly address 16 Mbytes of memory. In addition, the 80286 has an increased speed of operation and can easily perform many operations which were previously very complicated with the 8088.
It was desired that the existing subsystem circuit boards be capable of being used in the new AT, so the interface standard used in the PC was utilized and extended. A new interface standard was developed, which has become known as the Industry Standard Architecture (ISA). A second connector for each location was added to contain additional lines for the signals used in the extension. These lines included additional address and data lines to allow the use of the 24 bit addressing capability and 16 bit data transfers, additional interrupt and direct memory access lines to indicate whether the subsystem circuit board was capable of using the extended features. While the address values are presented by the 80286 microprocessor relatively early in an operation cycle, the PC interface standard could not utilize the initial portions of the address availability because of different timing standards for the 8088 around which the PC interface standard was designed. This limited the speed at which operations could occur because they were now limited to the interface standard memory timing specifications and could not operate at the rates available with the 80286. Therefore the newly added address lines included address signals previously available, but the newly added signals were available at an earlier time in a cycle. This change in address signal timing allowed operations which utilized the extended portions of the architecture to operate faster.
With the higher performance components available, it became possible to have a master unit other than the system microprocessor or direct memory access controller operating the bus. However, because of the need to cooperate with circuit boards which operated under the new sixteen bit standard or the old eight bit standard, each master unit was required to understand and operate with all the possible combinations of circuit boards. This increased the complexity of the master unit and resulted in a duplication of components, because the master unit had to incorporate many of the functions and features already performed by the logic and circuitry on the system board and on other master units. Additionally, the master unit was required to utilize the direct memory access controller to gain control of the bus, limiting prioritizing and the number of master units possible in a given computer system.
The capability of components continued to increase. Memory speeds and sizes increased, mass storage unit speeds and sizes increased, video unit resolutions increased and Intel Corporation introduced the 80386 microprocessor. The increased capabilities of the components created a desire for more use of master units, but the performance of a master unit was limited by the ISA specification and capabilities. The 80386 could not be fully utilized because it offered the capability to directly address 4 Gbytes of memory using 32 bits of address and could perform 32 bit wide data transfers, while the ISA standard allowed only 16 bits of data and 24 bits of address.
An extension similar to that performed in developing the ISA could be done to fully utilize the 80386's capabilities but this extension would have certain disadvantages. If it was desired to use any of the previously existing subsystem circuit boards, to prevent the need to replace at great cost the boards, the complexity of the interface standard increased greatly, so that the amount of redundant circuitry in a master unit would become oppressive, both in terms of component cost and space requirement. Additionally, a similar extension would not increase mastering capabilities significantly, but would still limit their operation because of difficulties in obtaining and controlling the bus which existed in the ISA. Further, the extension should allow the use of several different data widths so that a choice can be made, for example with 16 bit devices, to use one or the other protocol as desired so completely new designs would not be required. Then 16 bit master units would not have to operate using the more difficult mastering protocol of the ISA standard.